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The Horus system, designed by Newisys for AMD, was created to enable AMD Opteron machines to extend beyond the current limit of 8-way architectures. The Opteron CPUs feature a cache-coherent HyperTransport (ccHT) bus to permit glueless, multiprocessor interconnect between physical CPU packages but as there is a maximum of three ccHT interfaces per chip, the systems are limited to a maximum of 8 sockets. The HyperTransport bus is also distance restricted and does not permit off-system interconnect.
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